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» DRAMSim2: A Cycle Accurate Memory System Simulator
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JCSC
2002
87views more  JCSC 2002»
15 years 3 months ago
Power Estimator Development for Embedded System Memory Tuning
Memory accesses account for a large percentage of total power in microprocessor-based embedded systems. The increasing use of microprocessor cores and synthesis, rather than prefa...
Frank Vahid, Tony Givargis, Susan Cotterell
RTCSA
2007
IEEE
15 years 10 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
CODES
2004
IEEE
15 years 7 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
ICCD
2005
IEEE
110views Hardware» more  ICCD 2005»
16 years 25 days ago
Near-memory Caching for Improved Energy Consumption
Main memory has become one of the largest contributors to overall energy consumption and offers many opportunities for power/energy reduction. In this paper, we propose a PowerAw...
Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mos...
HIPEAC
2005
Springer
15 years 9 months ago
Memory-Centric Security Architecture
Abstract. This paper presents a new security architecture for protecting software confidentiality and integrity. Different from the previous process-centric systems designed for ...
Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee