Sciweavers

53 search results - page 6 / 11
» Data Speculation Support for a Chip Multiprocessor
Sort
View
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
13 years 11 months ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
ASPLOS
2008
ACM
13 years 9 months ago
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-...
FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 1 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
MICRO
2010
IEEE
128views Hardware» more  MICRO 2010»
13 years 5 months ago
Adaptive and Speculative Slack Simulations of CMPs on CMPs
Current trends signal an imminent crisis in the simulation of future CMPs (Chip MultiProcessors). Future micro-architectures will offer more and more thread contexts to execute pa...
Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, ...
ICPADS
2006
IEEE
14 years 1 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...