Sciweavers

213 search results - page 32 / 43
» Data Speculative Multithreaded Architecture
Sort
View
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 9 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
POPL
2010
ACM
13 years 7 months ago
S-Net for multi-memory multicores
S-NET is a declarative coordination language and component technology aimed at modern multi-core/many-core architectures and systems-on-chip. It builds on the concept of stream pr...
Clemens Grelck, Jukka Julku, Frank Penczek
HPCC
2005
Springer
14 years 2 months ago
A Hybrid Web Server Architecture for Secure e-Business Web Applications
Nowadays the success of many e-commerce applications, such as on-line banking, depends on their reliability, robustness and security. Designing a web server architecture that keep...
Vicenç Beltran, David Carrera, Jordi Guitar...
HPCA
2007
IEEE
14 years 9 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 3 months ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...