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» Data partitioning on chip multiprocessors
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3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
13 years 10 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...
ISSAC
2007
Springer
128views Mathematics» more  ISSAC 2007»
14 years 27 days ago
Productivity and performance using partitioned global address space languages
Partitioned Global Address Space (PGAS) languages combine the programming convenience of shared memory with the locality and performance control of message passing. One such langu...
Katherine A. Yelick, Dan Bonachea, Wei-Yu Chen, Ph...
COMPSAC
2009
IEEE
13 years 11 months ago
Transaction Level Control for Application Execution on the SegBus Platform
Abstract—We define here a simple, low level control procedure definition, to support application implementation on a particular multiprocessor platform, namely the SegBus segme...
Tiberiu Seceleanu, Ivica Crnkovic, Cristina Cersch...
EUROPAR
2004
Springer
14 years 4 days ago
OLAP Query Processing in a Database Cluster
OLAP queries are typically heavy-weight and ad-hoc thus requiring high storage capacity and processing power. In this paper, we address this problem using a database cluster which...
Alexandre A. B. Lima, Marta Mattoso, Patrick Valdu...
ICS
2009
Tsinghua U.
13 years 11 months ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad