244 search results - page 46 / 49 » Data partitioning on chip multiprocessors |
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
MICRO
2006
IEEE
14 years 21 days ago
2006
IEEE
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
MICRO
2006
IEEE
14 years 21 days ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
MICRO
2005
IEEE
14 years 8 days ago
2005
IEEE
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
SAMOS
2004
Springer
14 years 1 days ago
2004
Springer
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...