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MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
14 years 1 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 6 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
OSDI
2002
ACM
14 years 9 months ago
Scale and Performance in the Denali Isolation Kernel
This paper describes the Denali isolation kernel, an operating system architecture that safely multiplexes a large number of untrusted Internet services on shared hardware. Denali...
Andrew Whitaker, Marianne Shaw, Steven D. Gribble
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Probabilistic-Based Design Methodology for Nanoscale Computation
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
R. Iris Bahar, Joseph L. Mundy, Jie Chen
ARC
2007
Springer
169views Hardware» more  ARC 2007»
14 years 3 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...