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FPL
1997
Springer
123views Hardware» more  FPL 1997»
14 years 1 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
ICCAD
1994
IEEE
116views Hardware» more  ICCAD 1994»
14 years 1 months ago
Design of heterogeneous ICs for mobile and personal communication systems
{ Mobile and personal communication systems form key market areas for the electronics industry of the nineties. Stringent requirements in terms of exibility, performance and power...
Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catt...
FPL
1994
Springer
170views Hardware» more  FPL 1994»
14 years 1 months ago
A Fast FPGA Implementation of a General Purpose Neuron
The implementation of larger digital neural networks has not been possible due to the real-estate requirements of single neurons. We present an expandable digital architecture whic...
Valentina Salapura, Michael Gschwind, Oliver Maisc...
ARC
2008
Springer
89views Hardware» more  ARC 2008»
13 years 11 months ago
A Networked, Lightweight and Partially Reconfigurable Platform
Abstract. In this paper we present a networked lightweight and partially reconfigurable platform assisted by a remote bitstreams server. We propose a software and hardware architec...
Pierre Bomel, Guy Gogniat, Jean-Philippe Diguet
ISCAPDCS
2001
13 years 10 months ago
Branch Prediction of Conditional Nested Loops through an Address Queue
-Multi-dimensional applications, such as image processing and seismic analysis, usually require the optimized performance obtained from instruction-level parallelism. The critical ...
Zhigang Jin, Nelson L. Passos, Virgil Andronache