Sciweavers

1602 search results - page 186 / 321
» Database Architectures for New Hardware
Sort
View
DAC
2003
ACM
14 years 10 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
DSD
2009
IEEE
95views Hardware» more  DSD 2009»
14 years 3 months ago
The Parallel Sieve Method for a Virus Scanning Engine
This paper shows a new architecture for a virus scanning system, which is different from that of an intrusion detection system. The proposed method uses two-stage matching: In the...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura,...
DSD
2007
IEEE
120views Hardware» more  DSD 2007»
14 years 3 months ago
Cotransformation Provides Area and Accuracy Improvement in an HDL Library for LNS Subtraction
The reduction of the cumbersome operations of multiplication, division, and powering to addition, subtraction and multiplication is what makes the Logarithmic Number System (LNS) ...
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Ar...
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
14 years 3 months ago
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint
— Multiview video coding (MVC) systems require much more bandwidth and computational complexity relative to mono-view video systems. Thus, when designing a VLSI architecture for ...
Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi ...
EUROCAST
2001
Springer
106views Hardware» more  EUROCAST 2001»
14 years 1 months ago
On CAST.FSM Computation of Hierarchical Multi-layer Networks of Automata
CAST.FSM denotes a CAST tool which has been developed at the Institute of Systems Science at the University of Linz during the years 1986-1993. The first version of CAST.FSM was i...
Michael Affenzeller, Franz Pichler, Rudolf Mittelm...