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ASAP
2006
IEEE
108views Hardware» more  ASAP 2006»
13 years 11 months ago
New Schemes in Clustered VLIW Processors Applied to Turbo Decoding
State-of-the-art communication standards make extensive use of Turbo codes. The complex and power consuming designs that currently implement the turbo decoder expose the need for ...
Pablo Ituero, Marisa López-Vallejo
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
13 years 7 months ago
A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...
IEEEMM
2002
134views more  IEEEMM 2002»
13 years 7 months ago
A Middleware Architecture for Open and Interoperable GISs
an abstract model for information sharing and integration and use it to develop an architecture for building open, component-based, interoperable systems. A geographic information ...
Steven H. Wong, Steven L. Swartz, Dilip Sarkar
DAC
2004
ACM
13 years 11 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
14 years 24 days ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou