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ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
14 years 19 days ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
SIGMETRICS
2012
ACM
247views Hardware» more  SIGMETRICS 2012»
11 years 10 months ago
A scalable architecture for maintaining packet latency measurements
Latency has become an important metric for network monitoring since the emergence of new latency-sensitive applications (e.g., algorithmic trading and high-performance computing)....
Myungjin Lee, Nick G. Duffield, Ramana Rao Kompell...
ACSAC
2003
IEEE
14 years 1 months ago
MLS-PCA: A High Assurance Security Architecture for Future Avionics
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
Clark Weissman
ICCAD
1999
IEEE
89views Hardware» more  ICCAD 1999»
14 years 6 hour ago
A bipartition-codec architecture to reduce power in pipelined circuits
This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-J...
FODO
1993
Springer
110views Algorithms» more  FODO 1993»
13 years 11 months ago
Storage System Architectures for Continuous Media Data
Abstract. Data storage systems are being called on to manage continuous media data types, such as digital audio and video. There is a demand by applications for \constrained-latenc...
David Maier, Jonathan Walpole, Richard Staehli