Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
Power management in data centers has become an increasingly important concern. Large server installations are designed to handle peak load, which may be significantly larger than...
Vivek Sharma, Arun Thomas, Tarek F. Abdelzaher, Ke...
In this paper, we propose and evaluate a distributed, energy-efficient, light-weight framework for target localization and tracking in wireless sensor networks. Since radio commun...