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» Datapath Scheduling using Dynamic Frequency Clocking
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ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
14 years 3 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
FPGA
2012
ACM
300views FPGA» more  FPGA 2012»
12 years 6 months ago
Reducing the cost of floating-point mantissa alignment and normalization in FPGAs
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
Yehdhih Ould Mohammed Moctar, Nithin George, Hadi ...
MICRO
2003
IEEE
101views Hardware» more  MICRO 2003»
14 years 4 months ago
Macro-op Scheduling: Relaxing Scheduling Loop Constraints
Ensuring back-to-back execution of dependent instructions in a conventional out-of-order processor requires scheduling logic that wakes up and selects instructions at the same rat...
Ilhyun Kim, Mikko H. Lipasti
PLDI
2003
ACM
14 years 4 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
VLSID
2001
IEEE
117views VLSI» more  VLSID 2001»
14 years 11 months ago
Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces
Abstract - An adaptive approach for dynamic voltage scheduling on processors is presented based on workload prediction by filtering a trace history. The effects of update frequency...
Amit Sinha, Anantha Chandrakasan