69 search results - page 10 / 14 » Datapath Synthesis for Standard-Cell Design |
ISSS
1995
IEEE
14 years 4 days ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
ICCAD
1995
IEEE
14 years 4 days ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
AHS
2007
IEEE
14 years 18 days ago
2007
IEEE
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...
ISVLSI
2005
IEEE
14 years 2 months ago
2005
IEEE
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
ASPDAC
2007
ACM
14 years 18 days ago
2007
ACM
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...