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DATE
2009
IEEE
107views Hardware» more  DATE 2009»
15 years 7 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...
DATE
2004
IEEE
174views Hardware» more  DATE 2004»
15 years 7 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt
DATE
2004
IEEE
128views Hardware» more  DATE 2004»
15 years 7 months ago
Synthesis for Manufacturability: A Sanity Check
As we move towards nanometer technology, manufacturing problems become overwhelmingly difficult to solve. Presently, optimization for manufacturability is performed at a post-synt...
Alessandra Nardi, Alberto L. Sangiovanni-Vincentel...
DATE
2004
IEEE
114views Hardware» more  DATE 2004»
15 years 7 months ago
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
Zhong Wang, Xiaobo Sharon Hu
DATE
2004
IEEE
92views Hardware» more  DATE 2004»
15 years 7 months ago
Optimization of Integrated Spiral Inductors Using Sequential Quadratic Programming
The optimization of integrated spiral inductors has great practical importance. Previous optimization methods used in this field are either too slow or depend on very simplified a...
Yong Zhan, Sachin S. Sapatnekar