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121
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
This paper demonstrates a system that performs multiobjective sizing across 100,000 analog circuit topologies simultaneously, with SPICE accuracy. It builds on a previous system, ...
126
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...
140
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
The current work describes a new standing wave oscillator scheme aimed for clock propagation on coplanar transmission lines on a silicon die. The design is aimed for clock signali...
136
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
Increasing reliability at a minimum amount of extra cost is a major challenge in todays ECU network design. Considering reliability as an objective already in early design phases ...
136
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
Despite the growing research effort in formal verification, constraint-based random simulation remains an integral part of design validation, especially for large design componen...