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DATE
2003
IEEE
124views Hardware» more  DATE 2003»
15 years 9 months ago
Hierarchical Global Floorplacement Using Simulated Annealing and Network Flow Area Migration
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
Wonjoon Choi, Kia Bazargan
DATE
2010
IEEE
111views Hardware» more  DATE 2010»
15 years 9 months ago
Evaluation of runtime task mapping heuristics with rSesame - a case study
Abstract—rSesame is a generic modeling and simulation framework which can explore and evaluate reconfigurable systems at the early design stages. The framework can be used to ex...
Kamana Sigdel, Mark Thompson, Carlo Galuzzi, Andy ...
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
15 years 9 months ago
Reliability- and process variation-aware placement for FPGAs
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
Assem A. M. Bsoul, Naraig Manjikian, Li Shang
DATE
2002
IEEE
100views Hardware» more  DATE 2002»
15 years 9 months ago
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 9 months ago
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
Vivekananda M. Vedula, Jacob A. Abraham