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156
Voted
DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
131
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DATE
2010
IEEE
15 years 8 months ago
2010
IEEE
-- Starting Electronic System Level (ESL) design flows with executable High-Level Models (HLMs) has the potential to sustainably improve productivity. However, writing good HLMs fo...
149
Voted
DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
127
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DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
168
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DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of the cost/coverage trade-offs of fault-tolerant solutions. This fu...