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113
Voted
DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
—Today, many chips are designed with predefined discrete cell libraries. In this paper we present a new fast gate sizing algorithm that works natively with discrete cell choices...
121
Voted
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
119
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DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
119
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DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
UML2 and SysML try to adopt techniques known from software development to systems engineering. However, the focus has been put on modeling aspects until now and quantitative perfo...
121
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DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...