67 search results - page 7 / 14 » Defect Aware Test Patterns |
VTS
2005
IEEE
14 years 1 months ago
2005
IEEE
TARO test patterns are transition fault test patterns that sensitize each transition fault to all of the outputs that can be reached from the fault location. We were not able to i...
MVA
2007
13 years 8 months ago
2007
A two-dimensional (2-D) convolution mask is proposed for detecting the location of irregularities and defects in a periodic two-dimensional signal or image. In this approach, defe...
DAC
2000
ACM
13 years 11 months ago
2000
ACM
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
VLSID
2005
IEEE
14 years 1 months ago
2005
IEEE
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...