27 search results - page 1 / 6 » Delay Minimal Decomposition of Multiplexers in Technology Ma... |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
FPGA
2001
ACM
13 years 12 months ago
2001
ACM
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
FPGA
1995
ACM
13 years 11 months ago
1995
ACM
We study the nominal delay minimization problem in LUTbased FPGA technologymapping, where interconnect delay is assumed proportionalto net fanout size. We prove that the delay-opt...
DAC
1992
ACM
13 years 11 months ago
1992
ACM
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...