19 search results - page 1 / 4 » Delay optimal partitioning targeting low power VLSI circuits |
ICCAD
1995
IEEE
14 years 2 months ago
1995
IEEE
DAC
1995
ACM
14 years 2 months ago
1995
ACM
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
EAAI
2006
13 years 11 months ago
2006
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI ...
GLVLSI
2006
IEEE
14 years 4 months ago
2006
IEEE
Operating an integrated circuit at the prescribed nominal supply voltage is not preferable for reliable circuit operation under temperature fluctuations. A design methodology base...
ISPD
2010
ACM
14 years 5 months ago
2010
ACM
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...