86 search results - page 14 / 18 » Delay-Reduced Combinational Logic Synthesis using Multiplexe... |
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Despite the progress of the last decades in electronic design automation, arithmetic circuits have always received way less attention than other classes of digital circuits. Logic...
GLVLSI
2010
IEEE
14 years 1 months ago
2010
IEEE
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
SBCCI
2006
ACM
14 years 2 months ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
TCAD
2008
13 years 8 months ago
2008
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
DDECS
2006
IEEE
14 years 2 months ago
2006
IEEE
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...