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ASPDAC
2004
ACM
85views Hardware» more  ASPDAC 2004»
14 years 29 days ago
Integrating buffer planning with floorplanning for simultaneous multi-objective optimization
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
Yi-Hui Cheng, Yao-Wen Chang
ISQED
2002
IEEE
126views Hardware» more  ISQED 2002»
14 years 14 days ago
Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
Nicholas Chia-Yuan Chang, Yao-Wen Chang, Iris Hui-...
APNOMS
2006
Springer
13 years 11 months ago
Experiences in End-to-End Performance Monitoring on KOREN
As the network technology has been developed, the Next Generation Internet (NGI) such as Internet2, KOREN, KREONET2 and etc has been deployed to support bandwidth of Giga bps. And,...
Wang-Cheol Song, Deok-Jae Choi
FTNET
2007
107views more  FTNET 2007»
13 years 7 months ago
Network Optimization and Control
We study how protocol design for various functionalities within a communication network architecture can be viewed as a distributed resource allocation problem. This involves unde...
Srinivas Shakkottai, R. Srikant
CONEXT
2007
ACM
13 years 11 months ago
Fair and efficient scheduling in data ferrying networks
Data-ferrying disconnection-tolerant networks allow remote rural areas to access the Internet at very low cost, making them viable alternatives to more expensive access technologi...
Shimin Guo, Srinivasan Keshav