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TASE
2011
IEEE
13 years 4 months ago
Multiclass Flow Line Models of Semiconductor Manufacturing Equipment for Fab-Level Simulation
—For multiclass flow line models, we identify a class of service times that allow a decomposition of the system into subsets of servers called channels. In each channel, the cus...
James R. Morrison
ISORC
2005
IEEE
14 years 2 months ago
An Integrated Architecture for Future Car Generations
Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. The DECOS architec...
Philipp Peti, Roman Obermaisser, Fulvio Tagliabo, ...
ISSTA
2009
ACM
14 years 3 months ago
Loop-extended symbolic execution on binary programs
Mixed concrete and symbolic execution is an important technique for finding and understanding software bugs, including securityrelevant ones. However, existing symbolic execution...
Prateek Saxena, Pongsin Poosankam, Stephen McCaman...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 3 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
SCESM
2006
ACM
238views Algorithms» more  SCESM 2006»
14 years 3 months ago
Nobody's perfect: interactive synthesis from parametrized real-time scenarios
As technical systems keep growing more complex and sophisticated, designing software for the safety-critical coordination between their components becomes increasingly difficult....
Holger Giese, Stefan Henkler, Martin Hirsch, Flori...