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MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
BXML
2003
13 years 9 months ago
Rule-Based Generation of XML Schemas from UML Class Diagrams
We present an approach of how to automatically extract an XML document structure from a conceptual data model that describes the content of the document. We use UML class diagrams ...
Tobias Krumbein, Thomas Kudrass
DAC
2004
ACM
13 years 11 months ago
A methodology to improve timing yield in the presence of process variations
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wa...
IEAAIE
2010
Springer
13 years 5 months ago
Constructive Neural Networks to Predict Breast Cancer Outcome by Using Gene Expression Profiles
Abstract. Gene expression profiling strategies have attracted considerable interest from biologist due to the potential for high throughput analysis of hundreds of thousands of gen...
Daniel Urda, José Luis Subirats, Leonardo F...
FPL
2008
Springer
157views Hardware» more  FPL 2008»
13 years 9 months ago
Chosen-message SPA attacks against FPGA-based RSA hardware implementations
This paper presents SPA (Simple Power Analysis) attacks against public-key cryptosystems implemented on an FPGA platform. The SPA attack investigates a power waveform generated by...
Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Ak...