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NETWORKING
2007
13 years 9 months ago
Accelerated Packet Placement Architecture for Parallel Shared Memory Routers
Abstract. Parallel shared memory (PSM) routers represent an architectural approach for addressing the high memory bandwidth requirements dictated by output-queued switches. A funda...
Brad Matthews, Itamar Elhanany, Vahid Tabatabaee
CAD
2005
Springer
13 years 7 months ago
A new recognition model for electronic architectural drawings
Current methods for recognition and interpretation of architectural drawings are limited to either low-level analysis of paper drawings or interpretation of electronic drawings th...
Tong Lu, Chiew-Lan Tai, Feng Su, Shijie Cai
CF
2006
ACM
14 years 1 months ago
Dynamic thread assignment on heterogeneous multiprocessor architectures
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
Michela Becchi, Patrick Crowley
DAC
2008
ACM
14 years 8 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
IRREGULAR
1995
Springer
13 years 11 months ago
Run-Time Parallelization of Irregular DOACROSS Loops
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...
V. Prasad Krothapalli, Thulasiraman Jeyaraman, Mar...