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ISLPED
2007
ACM
99views Hardware» more  ISLPED 2007»
13 years 9 months ago
Thermal-aware task scheduling at the system software level
Power-related issues have become important considerations in current generation microprocessor design. One of these issues is that of elevated on-chip temperatures. This has an ad...
Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, H...
FPL
2009
Springer
102views Hardware» more  FPL 2009»
14 years 16 days ago
Macs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
Rohit Kumar, Ann Gordon-Ross
DFT
2005
IEEE
178views VLSI» more  DFT 2005»
14 years 1 months ago
Inter-Plane Via Defect Detection Using the Sensor Plane in 3-D Heterogeneous Sensor Systems
Defect and fault tolerance is being studied in a 3D Heterogeneous Sensor using a stacked chip with sensors located on the top plane, and inter-plane vias connecting these to other...
Glenn H. Chapman, Vijay K. Jain, Shekhar Bhansali
GPC
2007
Springer
13 years 11 months ago
A Design of Cooperation Management System to Improve Reliability in Resource Sharing Computing Environment
Resource sharing computing is a project that realizes high performance computing by utilizing the resources of peers that are connected to the Internet. Resource sharing computing ...
Ji Su Park, Kwang-Sik Chung, Jin Gon Shon
CHES
2005
Springer
155views Cryptology» more  CHES 2005»
14 years 1 months ago
Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization
Motivated by the goal of factoring large integers using the Number Field Sieve, several special-purpose hardware designs have been recently proposed for solving large sparse system...
Willi Geiselmann, Adi Shamir, Rainer Steinwandt, E...