The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Managing the complexity of designing chips containing billions of transistors requires decoupling computation from communication. For the communication, scalable and compositional...
Edwin Rijpkema, Kees G. W. Goossens, Andrei Radule...
In this paper we present Damon, a decentralized wide-area runtime aspect middleware built on top of a structured peer-topeer (p2p) substrate and a dynamic Aspect Oriented Programm...
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
Design Constraints imposed by global interconnect delays as well as limitations in integration of disparate technologies make 3-D chip stacks an enticing technology solution for m...
Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuw...