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» Design Patterns for Reconfigurable Computing
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ISCAS
2006
IEEE
101views Hardware» more  ISCAS 2006»
14 years 1 months ago
A cost-effective reconfigurable accelerator for platform-based SOC design
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigu...
Lan-Da Van, Hsin-Fu Luo, Nien-Hsiang Chang, Chun-M...
FPL
1998
Springer
135views Hardware» more  FPL 1998»
13 years 11 months ago
Designing for Xilinx XC6200 FPGAs
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
Reiner W. Hartenstein, Michael Herz, Frank Gilbert
CF
2004
ACM
13 years 11 months ago
Platform-independent methodology for partial reconfiguration
In this paper we present a novel methodology for partial (re-)configuration that can be used for most bitstream configured hardware (HW). In particular low priced and not for part...
Dirk Koch, Jürgen Teich
VLSID
2009
IEEE
143views VLSI» more  VLSID 2009»
14 years 8 months ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well...
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
CASES
2008
ACM
13 years 9 months ago
Compiling custom instructions onto expression-grained reconfigurable architectures
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi