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» Design Patterns for Reconfigurable Computing
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IPPS
2006
IEEE
14 years 2 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
ECOOPW
1997
Springer
14 years 27 days ago
Design Patterns vs. Language Design
This report investigates the relationships between design patterns and programming languages. A comparison is carried out between the usual track of programming languages developme...
Joseph Gil, David H. Lorenz
IPPS
2007
IEEE
14 years 3 months ago
Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing Elements
This paper presents a new and retargetable method to identify patterns of instructions with direct support in coarsegrained processing elements (PEs). The method uses a three-addr...
Carlos Morra, João M. P. Cardoso, Jürg...
DAC
2004
ACM
14 years 2 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
DATE
2002
IEEE
115views Hardware» more  DATE 2002»
14 years 1 months ago
Design Technology for Networked Reconfigurable FPGA Platforms
Future networked appliances should be able to download new services or upgrades from the network and execute them locally. This flexibility is typically achieved by processors tha...
Steve Guccione, Diederik Verkest, Ivo Bolsens