605 search results - page 89 / 121 » Design Principles for Combiners with Memory |
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
ISCA
2002
IEEE
14 years 1 months ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
DAC
1997
ACM
14 years 26 days ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
ASPLOS
1994
ACM
14 years 23 days ago
1994
ACM
There is an increasing trend to use commodity microprocessors as the compute engines in large-scale multiprocessors. However, given that the majority of the microprocessors are so...
CASES
2008
ACM
13 years 10 months ago
2008
ACM
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...