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ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
14 years 1 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
AAAI
2007
13 years 10 months ago
Extending Cognitive Architecture with Episodic Memory
In this paper, we explore the hypothesis that episodic memory is a critical component for cognitive architectures that support general intelligence. Episodic memory overlaps with ...
Andrew Nuxoll, John E. Laird
DAC
2003
ACM
14 years 9 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
14 years 8 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
ICMCS
2008
IEEE
168views Multimedia» more  ICMCS 2008»
14 years 2 months ago
A co-design platform for algorithm/architecture design exploration
The efficient implementation of multimedia algorithms, for the ever increasing complexity of the specifications and the emergence of the new generation of processing platforms c...
Christophe Lucarz, Marco Mattavelli, Julien Dubois