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121
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DAC
2006
ACM
16 years 4 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
134
Voted
MAM
2008
150views more  MAM 2008»
15 years 3 months ago
FPGA based string matching for network processing applications
String matching is a key problem in many network processing applications. Current implementations of this process using software are time consuming and cannot meet gigabit bandwid...
Janardhan Singaraju, John A. Chandy
FPGA
1995
ACM
142views FPGA» more  FPGA 1995»
15 years 7 months ago
The Design of RPM: An FPGA-based Multiprocessor Emulator
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it possible to build efficient hardware emulation engines. In addition, improveme...
Koray Öner, Luiz André Barroso, Sasan ...
IPPS
2006
IEEE
15 years 9 months ago
Investigation into programmability for layer 2 protocol frame delineation architectures
This paper presents the design and study of reconfigurable architectures for two data-link layer frame delineation techniques used for ATM and GFP. The architectures are targeted ...
Ciaran Toal, Sakir Sezer
DAC
2004
ACM
16 years 4 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan