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TCAD
2011
14 years 10 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
DAC
2005
ACM
15 years 6 months ago
Logic soft errors in sub-65nm technologies design and CAD challenges
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
Subhasish Mitra, Tanay Karnik, Norbert Seifert, Mi...
MOBIHOC
2009
ACM
16 years 4 months ago
Demonstration of highly programmable downlink OFDMA (WiMax) transceivers for SDR systems
In this paper, we present the architecture of a highly configurable multi-input multi?output (MIMO) orthogonal frequency division multiple access (OFDMA) platform. The platform is...
Hamid Eslami, Gaurav Patel, Chitaranjan P. Sukumar...
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
15 years 9 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
ERSA
2004
130views Hardware» more  ERSA 2004»
15 years 5 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna