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» Design and Analysis of a Robust Pipelined Memory System
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ISCA
2003
IEEE
116views Hardware» more  ISCA 2003»
14 years 29 days ago
A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay
Debuggers have been proven indispensable in improving software reliability. Unfortunately, on most real-life software, debuggers fail to deliver their most essential feature — a...
Min Xu, Rastislav Bodík, Mark D. Hill
IEEEPACT
1999
IEEE
13 years 12 months ago
Cameron: High level Language Compilation for Reconfigurable Systems
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm...
PDP
2009
IEEE
14 years 2 months ago
PsycoTrace: Virtual and Transparent Monitoring of a Process Self
PsycoTrace is a set of tools to protect a process P from attacks that alter P self as specified by its source code. P self is specified in terms of legal traces of system calls ...
Fabrizio Baiardi, Dario Maggiari, Daniele Sgandurr...
CODES
2003
IEEE
14 years 29 days ago
Early estimation of the size of VHDL projects
The analysis of the amount of human resources required to complete a project is felt as a critical issue in any company of the electronics industry. In particular, early estimatin...
William Fornaciari, Fabio Salice, Daniele Paolo Sc...
CVRMED
1997
Springer
13 years 12 months ago
Design considerations for a computer-vision-enabled ophthalmic augmented reality environment
We have initiated studies towards the design and implementation of an ophthalmic augmented reality environment in order to allow for a more precise laser treatment for ophthalmic...
Jeffrey W. Berger, Michael E. Leventon, Nobuhiko H...