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» Design and Analysis of a Robust Pipelined Memory System
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DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 11 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
14 years 4 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...
DSOM
2007
Springer
13 years 11 months ago
Bottleneck Detection Using Statistical Intervention Analysis
Abstract. The complexity of today's large-scale enterprise applications demands system administrators to monitor enormous amounts of metrics, and reconfigure their hardware as...
Simon Malkowski, Markus Hedwig, Jason Parekh, Calt...
BMCBI
2010
105views more  BMCBI 2010»
13 years 7 months ago
The Neural/Immune Gene Ontology: clipping the Gene Ontology for neurological and immunological systems
Background: The Gene Ontology (GO) is used to describe genes and gene products from many organisms. When used for functional annotation of microarray data, GO is often slimmed by ...
Nophar Geifman, Alon Monsonego, Eitan Rubin
CLEF
2010
Springer
13 years 4 months ago
Examining the Robustness of Evaluation Metrics for Patent Retrieval with Incomplete Relevance Judgements
Recent years have seen a growing interest in research into patent retrieval. One of the key issues in conducting information retrieval (IR) research is meaningful evaluation of the...
Walid Magdy, Gareth J. F. Jones