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IPPS
2000
IEEE
14 years 6 days ago
Study of a Multilevel Approach to Partitioning for Parallel Logic Simulation
Parallel simulation techniques are often employed to meet the computational requirements of large hardware simulations in order to reduce simulation time. In addition, partitionin...
Swaminathan Subramanian, Dhananjai Madhava Rao, Ph...
SPAA
1995
ACM
13 years 11 months ago
Provably Efficient Scheduling for Languages with Fine-Grained Parallelism
Many high-level parallel programming languages allow for fine-grained parallelism. As in the popular work-time framework for parallel algorithm design, programs written in such lan...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias
ICRA
1999
IEEE
94views Robotics» more  ICRA 1999»
14 years 3 days ago
Computing Parallel-Jaw Grips
In this paper we propose a new model for gripping parts with an industrial parallel-jaw gripper. In contrast to many previous models, we use two grip points and define candidate g...
Gordon Smith, Eric Lee, Kenneth Y. Goldberg, Karl-...
VIS
2007
IEEE
149views Visualization» more  VIS 2007»
14 years 9 months ago
Time Dependent Processing in a Parallel Pipeline Architecture
Pipeline architectures provide a versatile and efficient mechanism for constructing visualizations, and they have been implemented in numerous libraries and applications over the p...
John Biddiscombe, Berk Geveci, Ken Martin, Kenn...
IPPS
2006
IEEE
14 years 1 months ago
Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
Manuel Rubio del Solar, Juan Manuel Sánchez...