Sciweavers

335 search results - page 13 / 67
» Design and Implementation of Parallel Modified PrefixSpan Me...
Sort
View
CCGRID
2006
IEEE
13 years 11 months ago
Design of High Performance MVAPICH2: MPI2 over InfiniBand
MPICH2 provides a layered architecture for implementing MPI-2. In this paper, we provide a new design for implementing MPI-2 over InfiniBand by extending the MPICH2 ADI3 layer. Ou...
Wei Huang, Gopalakrishnan Santhanaraman, Hyun-Wook...
PPOPP
2010
ACM
13 years 9 months ago
Helper locks for fork-join parallel programming
Helper locks allow programs with large parallel critical sections, called parallel regions, to execute more efficiently by enlisting processors that might otherwise be waiting on ...
Kunal Agrawal, Charles E. Leiserson, Jim Sukha
VIS
2007
IEEE
149views Visualization» more  VIS 2007»
14 years 8 months ago
Time Dependent Processing in a Parallel Pipeline Architecture
Pipeline architectures provide a versatile and efficient mechanism for constructing visualizations, and they have been implemented in numerous libraries and applications over the p...
John Biddiscombe, Berk Geveci, Ken Martin, Kenn...
ICRA
1994
IEEE
118views Robotics» more  ICRA 1994»
13 years 11 months ago
Developing Parallel Architectures for Range and Image Sensors
We describe a cost-effective method for developing parallel architectures which increase the performance of range and image sensors. A parametrised edge detector and its systolic ...
Shaori Guo, Wayne Luk, Penelope Probert
IPPS
2009
IEEE
14 years 2 months ago
Implementing and evaluating multithreaded triad census algorithms on the Cray XMT
Commonly represented as directed graphs, social networks depict relationships and behaviors among social entities such as people, groups, and organizations. Social network analysi...
George Chin Jr., Andrès Márquez, Sut...