Sciweavers

335 search results - page 38 / 67
» Design and Implementation of Parallel Modified PrefixSpan Me...
Sort
View
FPL
2001
Springer
101views Hardware» more  FPL 2001»
14 years 27 days ago
An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
This paper presents an FPGA-based implementation of a syntactic parser that can process languages generated by almost unrestricted real-life context-free grammars (CFGs). More prec...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...
ASPLOS
2006
ACM
14 years 5 days ago
Integrated network interfaces for high-bandwidth TCP/IP
This paper proposes new network interface controller (NIC) designs that take advantage of integration with the host CPU to provide increased flexibility for operating system kerne...
Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhar...
TIP
2008
175views more  TIP 2008»
13 years 8 months ago
Algorithmic and Architectural Optimizations for Computationally Efficient Particle Filtering
Abstract--In this paper, we analyze the computational challenges in implementing particle filtering, especially to video sequences. Particle filtering is a technique used for filte...
Aswin C. Sankaranarayanan, Ankur Srivastava, Rama ...
IPPS
1998
IEEE
14 years 20 days ago
Deriving Efficient Cache Coherence Protocols through Refinement
Abstract. We address the problem of developing efficient cache coherence protocols implementing distributed shared memory (DSM) using message passing. A serious drawback of traditi...
Ratan Nalumasu, Ganesh Gopalakrishnan
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
14 years 13 days ago
Timing-Aware Decoupling Capacitance Allocation in Power Distribution Networks
Power supply noise increases the circuit delay, which may lead to performance failure of a design. Decoupling capacitance (decap) addition is effective in reducing the power suppl...
Sanjay Pant, David Blaauw