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» Design and Implementation of Semi-preemptible IO
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FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 9 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
BIBE
2007
IEEE
150views Bioinformatics» more  BIBE 2007»
15 years 11 months ago
Differential Scoring for Systolic Sequence Alignment
Systolic implementations of dynamic programming solutions that utilize a similarity matrix can achieve appreciable performance with both course- and fine-grain parallelization. A ...
Antonio E. de la Serna
PDPTA
2000
15 years 5 months ago
Performance Analysis of a Cluster File System
Design of cluster file system is very important for building a general-purpose cluster with commodity components. To provide scalable high I/O performance needed in the scientific...
Cong Du, Zhiwei Xu
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 9 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
IPPS
2002
IEEE
15 years 9 months ago
MPI/IO on DAFS over VIA: Implementation and Performance Evaluation
In this paper, we describe an implementation of MPI-IO on top of the Direct Access File System (DAFS) standard. The implementation is realized by porting ROMIO on top of DAFS. We ...
Jiesheng Wu, Dhabaleswar K. Panda