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HPCA
2006
IEEE
16 years 4 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
RTCSA
2007
IEEE
15 years 10 months ago
MB++: An Integrated Architecture for Pervasive Computing and High-Performance Computing
MB++ is a system that caters to the dynamic needs of applications in a distributed, pervasive computing environment that has a wide variety of devices that act as producers and co...
David J. Lillethun, David Hilley, Seth Horrigan, U...
DATE
1997
IEEE
86views Hardware» more  DATE 1997»
15 years 8 months ago
Highly scalable parallel parametrizable architecture of the motion estimator
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...
Radim Cmar, Serge Vernalde
ASPLOS
1987
ACM
15 years 8 months ago
Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures
This paper describes the design and implementation of virtual memory management within the CMU Mach Operating System and the experiences gained by the Mach kernel group in porting...
Richard F. Rashid, Avadis Tevanian, Michael Young,...
WWW
2003
ACM
15 years 9 months ago
Building Interoperability among Learning Content Management Systems
This paper addresses interoperability issues of learning content management systems. Motivation and design challenges are presented and an interoperability framework implemented a...
Bernd Simon, Symeon Retalis, Stefan Brantner