1224 search results - page 132 / 245 » Design and Implementation of a Practical Parallel Delaunay A... |
121
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WSC
1998
15 years 5 months ago
1998
Constructing models of systems that change their structure over time has proved to be a challenging problem, with several proposed solutions. We present two of these approaches an...
163
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ICS
2004
Tsinghua U.
15 years 10 months ago
2004
Tsinghua U.
We propose a novel replacement algorithm, called InterReference Gap Distribution Replacement (IGDR), for setassociative secondary caches of processors. IGDR attaches a weight to e...
197
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TVLSI
2010
14 years 11 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
130
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TON
2008
15 years 4 months ago
2008
-- Internet routers and Ethernet switches contain packet buffers to hold packets during times of congestion. Packet buffers are at the heart of every packet switch and router, whic...
109
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IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper is devoted to the study of number representations and algorithms leading to efficient implementations of modular adders and multipliers on recent Field Programmable Ar...