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DAC
2006
ACM
16 years 5 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
HIPC
2009
Springer
15 years 1 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
TCS
2011
14 years 11 months ago
Highly concurrent multi-word synchronization
d Abstract) Hagit Attiya and Eshcar Hillel Department of Computer Science, Technion The design of concurrent data structures is greatly facilitated by the availability of synchroni...
Hagit Attiya, Eshcar Hillel
POPL
2007
ACM
16 years 4 months ago
Preferential path profiling: compactly numbering interesting paths
Path profiles provide a more accurate characterization of a program's dynamic behavior than basic block or edge profiles, but are relatively more expensive to collect. This h...
Kapil Vaswani, Aditya V. Nori, Trishul M. Chilimbi
CAL
2007
15 years 4 months ago
Logic-Based Distributed Routing for NoCs
—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
José Flich, José Duato