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CN
2000
126views more  CN 2000»
13 years 8 months ago
Cartesian routing
The dominant backbone protocol implemented in the Internet is the Border Gateway Protocol (BGP). Each router implementing BGP maintains a routing table. As networks increase in si...
Larry Hughes, Omid Banyasad, Evan J. Hughes
DATE
2002
IEEE
118views Hardware» more  DATE 2002»
14 years 1 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...
BIOADIT
2006
Springer
14 years 16 days ago
Packet Classification with Evolvable Hardware Hash Functions - An Intrinsic Approach
Bandwidth demands of communication networks are rising permanently. Thus, the requirements to modern routers regarding packet classification are rising accordingly. Conventional al...
Harald Widiger, Ralf Salomon, Dirk Timmermann
ASAP
2003
IEEE
153views Hardware» more  ASAP 2003»
14 years 2 months ago
Hardware Synthesis for Multi-Dimensional Time
This paper introduces basic principles for extending the classical systolic synthesis methodology to multi-dimensional time. Multi-dimensional scheduling enables complex algorithm...
Anne-Claire Guillou, Patrice Quinton, Tanguy Risse...
HOTI
2005
IEEE
14 years 2 months ago
Addressing Queuing Bottlenecks at High Speeds
Modern routers and switch fabrics can have hundreds of input and output ports running at up to 10 Gb/s; 40 Gb/s systems are starting to appear. At these rates, the performance of ...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley