Sciweavers

249 search results - page 3 / 50
» Design and Implementation of the NUMAchine Multiprocessor
Sort
View
DATE
2004
IEEE
135views Hardware» more  DATE 2004»
14 years 4 days ago
A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design
We present the design exploration of a System-on-Chip architecture dedicated to the implementation of the HIPERLAN/2 communication protocol. The task was accomplished by means of ...
Francesco Menichelli, Mauro Olivieri, Luca Benini,...
ISSS
1995
IEEE
115views Hardware» more  ISSS 1995»
13 years 12 months ago
A system level design methodology for the optimization of heterogeneous multiprocessors
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...
Markus Schwiegershausen, Peter Pirsch
IPPS
2006
IEEE
14 years 2 months ago
Multiprocessor on chip: beating the simulation wall through multiobjective design space exploration with direct execution
Design space exploration of multiprocessors on chip requires both automatic performance analysis techniques and efficient multiprocessors configuration performance evaluation. Pr...
Riad Ben Mouhoub, Omar Hammami
HIPC
2005
Springer
14 years 1 months ago
Design and Implementation of the HPCS Graph Analysis Benchmark on Symmetric Multiprocessors
Graph theoretic problems are representative of fundamental computations in traditional and emerging scientific disciplines like scientific computing, computational biology and b...
David A. Bader, Kamesh Madduri
IPPS
1998
IEEE
14 years 20 days ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...