862 search results - page 113 / 173 » Design and Implementation of the TRIPS Primary Memory System |
132
Voted
ASPLOS
2012
ACM
14 years 6 days ago
2012
ACM
Traditional storage systems provide a simple read/write interface, which is inadequate for low-locality update-intensive workloads because it limits the disk scheduling flexibili...
148
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ASPLOS
2011
ACM
14 years 8 months ago
2011
ACM
Transiently powered computing devices such as RFID tags, kinetic energy harvesters, and smart cards typically rely on programs that complete a task under tight time constraints be...
137
Voted
ISCAS
2002
IEEE
15 years 9 months ago
2002
IEEE
We have implemented an aspect of learning and memory in the nervous system using analog electronics. Using a simple synaptic circuit we realize networks with Hebbian type adaptati...
171
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ICS
2010
Tsinghua U.
15 years 7 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
156
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HPCA
2008
IEEE
16 years 4 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...