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» Design and Implementation of the TRIPS Primary Memory System
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IPPS
2007
IEEE
15 years 10 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
PPOPP
2006
ACM
15 years 10 months ago
Fast and transparent recovery for continuous availability of cluster-based servers
Recently there has been renewed interest in building reliable servers that support continuous application operation. Besides maintaining system state consistent after a failure, o...
Rosalia Christodoulopoulou, Kaloian Manassiev, Ang...
132
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HPCA
2006
IEEE
16 years 4 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...
IPPS
2008
IEEE
15 years 11 months ago
Scaling alltoall collective on multi-core systems
MPI Alltoall is one of the most communication intense collective operation used in many parallel applications. Recently, the supercomputing arena has witnessed phenomenal growth o...
Rahul Kumar, Amith R. Mamidala, Dhabaleswar K. Pan...
ICFP
2006
ACM
16 years 4 months ago
The development of Chez Scheme
Chez Scheme is now over 20 years old, the first version having been released in 1985. This paper takes a brief look back on the history of Chez Scheme's development to explor...
R. Kent Dybvig