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» Design and Implementation of the TRIPS Primary Memory System
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ICCD
2001
IEEE
106views Hardware» more  ICCD 2001»
14 years 4 months ago
A Low-Power Cache Design for CalmRISCTM-Based Systems
Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dom...
Sangyeun Cho, Wooyoung Jung, Yongchun Kim, Seh-Woo...
GIS
2003
ACM
14 years 8 months ago
An efficient r-tree implementation over flash-memory storage systems
For many applications with spatial data management such as Geographic Information Systems (GIS), block-oriented access over flash memory could introduce a significant number of no...
Chin-Hsien Wu, Li-Pin Chang, Tei-Wei Kuo
ARCS
2009
Springer
14 years 1 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
DATE
2000
IEEE
94views Hardware» more  DATE 2000»
13 years 11 months ago
Shared Memory Implementations of Synchronous Dataflow Specifications
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
Praveen K. Murthy, Shuvra S. Bhattacharyya
RTAS
2000
IEEE
13 years 11 months ago
Design and Implementation of a Caching System for Streaming Media over the Internet
Congested networks and overloaded servers resulting from the ever growing number of Internet users contribute to the lack of good quality video streaming over the Internet. We pro...
Ethendranath Bommaiah, Katherine Guo, Markus Hofma...