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» Design and application of multimodal power gating structures
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ISLPED
2006
ACM
117views Hardware» more  ISLPED 2006»
14 years 2 months ago
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
Samuel Rodríguez, Bruce L. Jacob
CF
2005
ACM
13 years 10 months ago
Drowsy region-based caches: minimizing both dynamic and static power dissipation
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
Michael J. Geiger, Sally A. McKee, Gary S. Tyson
CDES
2008
90views Hardware» more  CDES 2008»
13 years 10 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
ICCAD
1994
IEEE
116views Hardware» more  ICCAD 1994»
14 years 1 months ago
Design of heterogeneous ICs for mobile and personal communication systems
{ Mobile and personal communication systems form key market areas for the electronics industry of the nineties. Stringent requirements in terms of exibility, performance and power...
Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catt...
IPPS
2007
IEEE
14 years 3 months ago
An Architectural Framework for Automated Streaming Kernel Selection
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...