Sciweavers

427 search results - page 32 / 86
» Design and application of multimodal power gating structures
Sort
View
ASPDAC
2006
ACM
159views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...
Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh...
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
13 years 11 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
14 years 5 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran
DAC
2002
ACM
14 years 9 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik